Difference between revisions of "ESim/C4/Advanced-NgVeri/English"
(Created page with " {| border="1" |- || '''Visual Cue''' || '''Narration''' |- || Show Slide:''' Title slide''' || Welcome to the '''Spoken Tutorial''' on '''Advanced NgVeri.''' |- || Sho...") |
Nancyvarkey (Talk | contribs) |
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|| In this tutorial, we will learn how to, | || In this tutorial, we will learn how to, | ||
* Add '''dependency files''' and '''folders''' | * Add '''dependency files''' and '''folders''' | ||
− | * Remove '''NgVeri ''' | + | * Remove '''NgVeri models''' and |
− | * Add and remove '''lint_off ''' | + | * Add and remove '''lint_off commands'''. |
in '''Ngveri'''. | in '''Ngveri'''. | ||
|- | |- | ||
|| Show Slide:''' System Requirements''' | || Show Slide:''' System Requirements''' | ||
− | || To record this tutorial, I am using* '''Ubuntu OS v20.04 ''' | + | || To record this tutorial, I am using |
+ | * '''Ubuntu OS v20.04 ''' | ||
* '''eSim v2.2''' | * '''eSim v2.2''' | ||
The process demonstrated in this tutorial is similar in '''Windows OS''' also. | The process demonstrated in this tutorial is similar in '''Windows OS''' also. | ||
Line 57: | Line 58: | ||
*For demonstration, we have taken the''' 8bit_vedic_multiplierproject.''' | *For demonstration, we have taken the''' 8bit_vedic_multiplierproject.''' | ||
* Note that the '''8bit_vedic_multiplier '''is taken from [https://opencores.org/projects/8bit_vedic_multiplier opencores.org] | * Note that the '''8bit_vedic_multiplier '''is taken from [https://opencores.org/projects/8bit_vedic_multiplier opencores.org] | ||
− | * The same project folder is provided in the Code files link. | + | * The same project folder is provided in the '''Code files''' link. |
|- | |- | ||
Line 93: | Line 94: | ||
Highlighting the error message in the''' Terminal''' | Highlighting the error message in the''' Terminal''' | ||
− | || We see a message '''There was an error during model creation''' in the terminal. | + | || We see a message '''There was an error during model creation''' in the '''terminal'''. |
Let us scroll up to see why the error occurred. | Let us scroll up to see why the error occurred. | ||
Line 102: | Line 103: | ||
|| We see another message '''Cannot find file containing module: 'half_adder''''. | || We see another message '''Cannot find file containing module: 'half_adder''''. | ||
− | The message indicates that the '''half_adder''' | + | The message indicates that the '''half_adder dependency''' file is missing in the '''eSim '''interface. |
− | So let us add the dependency file. | + | So let us add the '''dependency''' file. |
|- | |- | ||
|| '''Makerchip-NgVeri:''' | || '''Makerchip-NgVeri:''' | ||
Click on the '''Add Other file''' option | Click on the '''Add Other file''' option | ||
− | ||'''Dependency files''' are the files which are an extension to the ''' | + | ||'''Dependency files''' are the files which are an extension to the top '''module''' file. |
+ | |||
+ | The '''Add Other file''' option is used to add '''dependency''' files to the '''Verilog''' file. | ||
Let us click on it. | Let us click on it. | ||
Line 129: | Line 132: | ||
Click on the '''Open''' button. | Click on the '''Open''' button. | ||
− | In the '''terminal '''we see''' ''' | + | In the '''terminal '''we see that the '''dependency''' file '''half_adder.v '''has been added to '''eSim'''. |
|- | |- | ||
|| '''Makerchip-NgVeri:''' | || '''Makerchip-NgVeri:''' | ||
Line 136: | Line 139: | ||
Click on''' Run Verilog to Ngspice Converter''' | Click on''' Run Verilog to Ngspice Converter''' | ||
− | || Let us generate the model again. | + | || Let us generate the '''model''' again. |
− | Click on the '''Clear Terminal''' | + | Click on the '''Clear Terminal''' button to clear the '''terminal'''. |
− | Now | + | Now click on''' Run Verilog to Ngspice Converter.''' |
|- | |- | ||
|| '''Makerchip-NgVeri:''' | || '''Makerchip-NgVeri:''' | ||
Line 149: | Line 152: | ||
This indicates that the previous error has been rectified. | This indicates that the previous error has been rectified. | ||
− | Now the model can be used to create a '''Mixed-Signal schematic''' in '''eSim'''.Please refer to the earlier tutorials to do the same. | + | Now the '''model''' can be used to create a '''Mixed-Signal schematic''' in '''eSim'''.Please refer to the earlier tutorials to do the same. |
|- | |- | ||
|| Only narration | || Only narration | ||
− | || Let's now look at adding a dependency folder. | + | || Let's now look at adding a '''dependency''' folder. |
This is done when a user needs to add more files. | This is done when a user needs to add more files. | ||
Line 163: | Line 166: | ||
Click on''' Open''' | Click on''' Open''' | ||
− | || Let us switch back to the''' Makerchip''' | + | || Let us switch back to the''' Makerchip''' tab by clicking on it. |
Then click on''' Add Top Level Verilog File''' to add the '''vedic8x8.v''' '''verilog''' file.. | Then click on''' Add Top Level Verilog File''' to add the '''vedic8x8.v''' '''verilog''' file.. | ||
Line 176: | Line 179: | ||
Click on '''Run Verilog to Ngspice Converter''' | Click on '''Run Verilog to Ngspice Converter''' | ||
− | || Let us generate the model of''' vedic8x8.v.''' | + | || Let us generate the '''model''' of''' vedic8x8.v.''' |
− | To do so, again click on the '''NgVeri ''' | + | To do so, again click on the '''NgVeri '''tab. |
Then click on '''Run Verilog to Ngspice Converter.''' | Then click on '''Run Verilog to Ngspice Converter.''' | ||
Line 187: | Line 190: | ||
Highlight another error message ‘'''Cannot find file containing module: 'vedic4x4’''' in the '''Terminal''' | Highlight another error message ‘'''Cannot find file containing module: 'vedic4x4’''' in the '''Terminal''' | ||
− | || We see the same error message in the terminal. | + | || We see the same error message in the '''terminal'''. |
− | Let us scroll up to see why the error occurred.We see another message '''Cannot find file containing module: 'vedic4x4''''. | + | Let us scroll up to see why the error occurred. |
+ | |||
+ | We see another message '''Cannot find file containing module: 'vedic4x4''''. | ||
− | It indicates that the ''''vedic4x4' '''and the other''' ''' | + | It indicates that the ''''vedic4x4' '''and the other '''dependency''' files are missing. |
So, we will now add all the files at once using the''' Add Folder''' Option. | So, we will now add all the files at once using the''' Add Folder''' Option. | ||
Line 212: | Line 217: | ||
|| A pop-up appears. | || A pop-up appears. | ||
− | If we click on '''Yes, '''the only contents of the folder will be added | + | If we click on '''Yes, '''the only contents of the folder will be added. |
If we click on '''No, '''the complete folder will be added. | If we click on '''No, '''the complete folder will be added. | ||
Line 223: | Line 228: | ||
|| I will click on '''Yes.''' | || I will click on '''Yes.''' | ||
− | We can see in the ''' | + | We can see in the '''terminal '''that the '''dependency''' folder has been added. |
− | '''Dependency files''' | + | '''Dependency files'''or '''folders''' help us to divide a large '''Verilog''' file into '''submodules'''. |
The user can make use of this option depending upon the requirement. | The user can make use of this option depending upon the requirement. | ||
Line 232: | Line 237: | ||
Click on''' Run Verilog to Ngspice Converter''' | Click on''' Run Verilog to Ngspice Converter''' | ||
− | || Let us generate the model again. | + | || Let us generate the '''model''' again. |
− | Click on the '''Clear Terminal''' | + | Click on the '''Clear Terminal''' button to clear the '''terminal'''. |
− | Now | + | Now click on''' Run Verilog to Ngspice Converter.''' |
|- | |- | ||
|| '''Makerchip-NgVeri:''' | || '''Makerchip-NgVeri:''' | ||
Highlighting the message on the''' Terminal''' | Highlighting the message on the''' Terminal''' | ||
− | || We see the''' Model Created Successfully '''has appeared in the terminal without any errors. | + | || We see the''' Model Created Successfully '''has appeared in the '''terminal''' without any errors. |
|- | |- | ||
|| Only Narration | || Only Narration | ||
− | || Next, let us look at the concept of '''Linting '''in eSim. | + | || Next, let us look at the concept of '''Linting '''in '''eSim'''. |
|- | |- | ||
|| '''Slide:''' | || '''Slide:''' | ||
Line 250: | Line 255: | ||
About '''lint:''' | About '''lint:''' | ||
|| | || | ||
− | * '''Linting '''helps us to check programmatic or stylistic errors in a program. | + | * '''Linting '''helps us to check programmatic or stylistic errors in a '''program'''. |
− | * '''lint_off '''errors/warnings create a problem in compilation of '''NgVeri'''. | + | * '''lint_off '''errors/warnings create a problem in '''compilation''' of '''NgVeri'''. |
− | * To ignore these '''lint_off errors, lint_off | + | * To ignore these '''lint_off errors, lint_off commands '''need to be added or removed. |
* To know more about '''lint_off commands''', please refer this website: [https://verilator.org/guide/latest/warnings.html#list-of-warnings https://verilator.org/guide/latest/warnings.html#list-of-warnings] | * To know more about '''lint_off commands''', please refer this website: [https://verilator.org/guide/latest/warnings.html#list-of-warnings https://verilator.org/guide/latest/warnings.html#list-of-warnings] | ||
Line 261: | Line 266: | ||
|| Click on the '''Edit lint_off '''dropdown | || Click on the '''Edit lint_off '''dropdown | ||
− | || Let us explore the '''Edit lint_off '''option by clicking on its | + | || Let us explore the '''Edit lint_off '''option by clicking on its drop-down. |
− | We see the list of all the '''lint_off ''' | + | We see the list of all the '''lint_off commands'''. |
+ | |||
+ | The''' lint_off commands''' help to ignore''' lint_off warnings''' in '''Verilator compilation'''. | ||
|- | |- | ||
|| Select '''EOFNEWLINE''' | || Select '''EOFNEWLINE''' | ||
− | || Let us remove one of the '''lint_off''' | + | || Let us remove one of the '''lint_off commands''' and see what happens. |
+ | |||
+ | Select '''EOFNEWLINE '''from the drop-down menu. | ||
− | + | '''EOFNEWLINE '''occurs when there is no empty line at the end of file. | |
|- | |- | ||
|| Click on '''OK''' | || Click on '''OK''' | ||
Line 274: | Line 283: | ||
|- | |- | ||
|| Click on the '''Edit lint_off''' dropdown | || Click on the '''Edit lint_off''' dropdown | ||
− | || Now, again click on '''Edit lint_off ''' | + | || Now, again click on '''Edit lint_off '''drop-down. |
− | We see that the | + | We see that the '''command EOFNEWLINE '''is removed successfully. |
|- | |- | ||
|| '''Makerchip-NgVeri:''' | || '''Makerchip-NgVeri:''' | ||
Line 283: | Line 292: | ||
Click on''' Run Verilog to Ngspice Converter''' | Click on''' Run Verilog to Ngspice Converter''' | ||
− | || Let us generate the model again to see the changes. | + | || Let us generate the '''model''' again to see the changes. |
− | Click on the '''Clear Terminal''' | + | Click on the '''Clear Terminal''' button and then on''' Run Verilog to Ngspice Converter''' |
|- | |- | ||
|| '''Makerchip-NgVeri:'''Highlighting the error message in the''' Terminal''' | || '''Makerchip-NgVeri:'''Highlighting the error message in the''' Terminal''' | ||
Line 292: | Line 301: | ||
Highlight another error in the '''Terminal''' | Highlight another error in the '''Terminal''' | ||
− | || We see a message '''There was an error during model creation''' in the terminal. | + | || We see a message '''There was an error during model creation''' in the '''terminal'''. |
+ | |||
+ | Let us again scroll up to see why the error occurred. | ||
− | + | We see another message '''Missing newline at end of file'''. | |
|- | |- | ||
|| Point to the the '''text box''' near''' Add Lint_off''' option | || Point to the the '''text box''' near''' Add Lint_off''' option | ||
− | || To resolve this error we need to add the '''EOFNEWLINE | + | || To resolve this error, we need to add the '''EOFNEWLINE Lint_off command''' again. |
− | We can see a | + | We can see a text box to the left of the '''Add Lint_off '''option. |
|- | |- | ||
|| Type '''EOFNEWLINE''' | || Type '''EOFNEWLINE''' | ||
Click on '''Add Lint_Off''' | Click on '''Add Lint_Off''' | ||
− | || Type a '''lint_off command''' in the | + | || Type a '''lint_off command''' in the text box. |
Let us type '''EOFNEWLINE''' in the text box. | Let us type '''EOFNEWLINE''' in the text box. | ||
Line 311: | Line 322: | ||
|- | |- | ||
|| Click on '''Edit lint_off''' dropdown | || Click on '''Edit lint_off''' dropdown | ||
− | || Go back to the '''Edit lint_off ''' | + | || Go back to the '''Edit lint_off '''drop-down and click on it. |
|- | |- | ||
|| Point towards '''EOFNEWLINE '''command | || Point towards '''EOFNEWLINE '''command | ||
− | || We see that the | + | || We see that the '''command EOFNEWLINE '''is now added. |
|- | |- | ||
|| '''Makerchip-NgVeri:''' | || '''Makerchip-NgVeri:''' | ||
Line 321: | Line 332: | ||
Click on''' Run Verilog to Ngspice Converter''' | Click on''' Run Verilog to Ngspice Converter''' | ||
− | || Let us generate the model again. | + | || Let us generate the '''model''' again. |
− | Click on the '''Clear Terminal''' | + | Click on the '''Clear Terminal''' button to clear the '''terminal'''. |
− | Now | + | Now click on''' Run Verilog to Ngspice Converter''' |
|- | |- | ||
Line 331: | Line 342: | ||
Highlighting the message on the''' Terminal''' | Highlighting the message on the''' Terminal''' | ||
− | || We see the''' Model Created Successfully '''in the terminal. | + | || We see the''' Model Created Successfully '''in the '''terminal'''. |
|- | |- | ||
|| Point towards '''Edit modlst ''' | || Point towards '''Edit modlst ''' | ||
− | || Let us look at how to see all the models present in '''NgVeri''' . | + | || Let us look at how to see all the '''models''' present in '''NgVeri''' . |
− | The '''Edit modlst '''option is used to see all the models present in the '''NgVeri.''' | + | The '''Edit modlst '''option is used to see all the '''models''' present in the '''NgVeri.''' |
|- | |- | ||
|| Click on the '''Edit modlst ''' | || Click on the '''Edit modlst ''' | ||
− | || Click on the '''Edit modlst ''' | + | || Click on the '''Edit modlst '''drop-down. |
− | We see a list of models. | + | We see a list of '''models'''. |
|- | |- | ||
|| Only Narration | || Only Narration | ||
− | || Let us see the purpose of removing the '''NgVeri ''' | + | || Let us see the purpose of removing the '''NgVeri model.''' |
|- | |- | ||
|| '''Slide:''' | || '''Slide:''' | ||
Line 353: | Line 364: | ||
'''Removing NgVeri Model:''' | '''Removing NgVeri Model:''' | ||
|| | || | ||
− | * While creating a model, sometimes we might get an error which can’t be resolved. | + | * While creating a '''model''', sometimes we might get an error which can’t be resolved. |
− | * The error creates problems in building '''NgVeri''' for future ''' | + | * The error creates problems in building '''NgVeri''' for future '''Verilog''' files also. |
− | * In such a case, the error giving model must be removed by the '''Edit modlst '''option. | + | * In such a case, the error giving '''model''' must be removed by the '''Edit modlst '''option. |
− | * The error model can be identified in the terminal. | + | * The error '''model''' can be identified in the '''terminal'''. |
− | * The '''Edit modlst '''option is useful to users to remove redundant models. | + | * The '''Edit modlst '''option is useful to users to remove redundant '''models'''. |
* It also reduces memory space | * It also reduces memory space | ||
|- | |- | ||
|| Select '''counter4bit''' | || Select '''counter4bit''' | ||
− | || For example, let us remove the '''counter4bit''' | + | || For example, let us remove the '''counter4bit model''' assuming that it is giving error. |
− | To do so, click on '''counter4bit '''from the | + | To do so, click on '''counter4bit '''from the drop-down. |
|- | |- | ||
|| Click on '''OK''' | || Click on '''OK''' | ||
− | || Click on '''OK '''in the | + | || Click on '''OK '''in the '''Warning''' dialog box. |
|- | |- | ||
|| Only Narration | || Only Narration | ||
Line 373: | Line 384: | ||
|- | |- | ||
|| Highlight the build commands | || Highlight the build commands | ||
− | || We see the build commands have run in the terminal. | + | || We see the '''build commands''' have '''run''' in the '''terminal'''. |
|- | |- | ||
|| | || | ||
Click on '''Edit modlst''' dropdown menu | Click on '''Edit modlst''' dropdown menu | ||
− | || Let us now check whether the model is removed. | + | || Let us now check whether the '''model''' is removed. |
Again click on the '''Edit modlst '''dropdown. | Again click on the '''Edit modlst '''dropdown. | ||
− | We see that the | + | We see that the '''model counter4bit '''is removed successfully. |
|- | |- | ||
|| Show Slide:'''Summary''' | || Show Slide:'''Summary''' | ||
Line 392: | Line 403: | ||
In this tutorial, we have | In this tutorial, we have | ||
* Added '''dependency''' files and folders | * Added '''dependency''' files and folders | ||
− | * Removed '''NgVeri''' | + | * Removed '''NgVeri models''' and |
− | * Added and removed '''lint_off ''' | + | * Added and removed '''lint_off commands''' |
in '''NgVeri'''. | in '''NgVeri'''. | ||
|- | |- | ||
|| Show Slide:''' Assignment''' | || Show Slide:''' Assignment''' | ||
− | || As an assignment, please do the following:* Click on the''' Edit lint_off''' | + | || As an assignment, please do the following:\ |
− | * Check all the commands in the drop down | + | * Click on the''' Edit lint_off''' |
− | * Remove the '''CASEX''' '''lint_off ''' | + | * Check all the '''commands''' in the drop-down |
− | * Click on the '''Run Verilog to Ngspice Converter''' to generate the model again | + | * Remove the '''CASEX''' '''lint_off command''' |
+ | * Click on the '''Run Verilog to Ngspice Converter''' to generate the '''model''' again | ||
* Check if there are errors. | * Check if there are errors. | ||
− | * Add the '''CASEX''' | + | * Add the '''CASEX command''' again using the '''Add lint_off '''option. |
− | * Check whether it has been added by clicking on''' Edit lint_off''' | + | * Check whether it has been added by clicking on''' Edit lint_off''' drop-down. |
|- | |- |
Latest revision as of 17:28, 11 January 2023
Visual Cue | Narration |
Show Slide: Title slide | Welcome to the Spoken Tutorial on Advanced NgVeri. |
Show Slide: Learning Objectives | In this tutorial, we will learn how to,
in Ngveri. |
Show Slide: System Requirements | To record this tutorial, I am using
The process demonstrated in this tutorial is similar in Windows OS also. |
Show Slide:
Prerequisites |
To follow this tutorial, the learner must have:
|
Show Slide: Code Files |
|
Only narration | First we will see how to add the dependency files |
Slide:
Example: Add Dependency Files |
|
Click on the Makerchip tab. | Go to the eSim main window and click on the Makerchip tab.
Now we will see how to add the dependency files. |
Click on Add Top Level Verilog File | For this, click on the Add Top Level Verilog File option. |
Click on Downloads>>8bit_vedic_multiplier
Browse the full_adder.v file Click on Open |
Go to the Downloads Folder and locate the 8bit_vedic_multiplier folder.
Then select the full_adder.v file and click on the Open button. The file gets loaded. |
Makerchip-NgVeri:
Switch to the NgVeri Tab Click on Run Verilog to Ngspice Converter |
Let us generate the model of full_adder.v using NgVeri.
To do so, click on the NgVeri Tab. Then click on Run Verilog to Ngspice Converter. |
Makerchip-NgVeri:
Highlighting the error message in the Terminal |
We see a message There was an error during model creation in the terminal.
Let us scroll up to see why the error occurred. |
Scroll Up
Highlight another error in the Terminal |
We see another message Cannot find file containing module: 'half_adder'.
The message indicates that the half_adder dependency file is missing in the eSim interface. So let us add the dependency file. |
Makerchip-NgVeri:
Click on the Add Other file option |
Dependency files are the files which are an extension to the top module file.
The Add Other file option is used to add dependency files to the Verilog file. Let us click on it. |
Point towards the dialog box | We see a dialog box open up. |
Locate and select half_adder.v file Click on Open Highlight the message in the Terminal |
The half_adder.v is present in the 8bit_vedic_multiplier folder.
Locate and select the verilog file half_adder.v from the Downloads folder. Click on the Open button. In the terminal we see that the dependency file half_adder.v has been added to eSim. |
Makerchip-NgVeri:
Click on the Clear Terminal Button Click on Run Verilog to Ngspice Converter |
Let us generate the model again.
Click on the Clear Terminal button to clear the terminal. Now click on Run Verilog to Ngspice Converter. |
Makerchip-NgVeri:
Highlighting the message on the Terminal |
We see the Model Created Successfully has appeared in the terminal.
This indicates that the previous error has been rectified. Now the model can be used to create a Mixed-Signal schematic in eSim.Please refer to the earlier tutorials to do the same. |
Only narration | Let's now look at adding a dependency folder.
This is done when a user needs to add more files. |
Switch to Makerchip tab
Click on Add Top Level Verilog File Click on Downloads>>8bit_vedic_multiplier>>vedic8x8.v Click on Open |
Let us switch back to the Makerchip tab by clicking on it.
Then click on Add Top Level Verilog File to add the vedic8x8.v verilog file.. Go to the Downloads Folder and then to 8bit_vedic_multiplier. Select the vedic8x8.v file and click on the Open button. |
Makerchip-NgVeri:
Switch to the NgVeri Tab Click on Run Verilog to Ngspice Converter |
Let us generate the model of vedic8x8.v.
To do so, again click on the NgVeri tab. Then click on Run Verilog to Ngspice Converter. |
Makerchip-NgVeri:Highlighting the error message in the Terminal
Scroll Up Highlight another error message ‘Cannot find file containing module: 'vedic4x4’ in the Terminal |
We see the same error message in the terminal.
Let us scroll up to see why the error occurred. We see another message Cannot find file containing module: 'vedic4x4'. It indicates that the 'vedic4x4' and the other dependency files are missing. So, we will now add all the files at once using the Add Folder Option. |
Makerchip-NgVeri:
Click on Add Folder |
Click on the Add Folder option. |
Locate and select the 8bit_vedic_multiplier folder
Click on Open |
A dialog box opens.
Locate and select the 8bit_vedic_multiplier folder. Click on the Open button. |
Point to the Message dialog box | A pop-up appears.
If we click on Yes, the only contents of the folder will be added. If we click on No, the complete folder will be added. |
Makerchip-NgVeri:
Click on Yes Highlight the message in the Terminal |
I will click on Yes.
We can see in the terminal that the dependency folder has been added. Dependency filesor folders help us to divide a large Verilog file into submodules. The user can make use of this option depending upon the requirement. |
Makerchip-NgVeri:
Click on Run Verilog to Ngspice Converter |
Let us generate the model again.
Click on the Clear Terminal button to clear the terminal. Now click on Run Verilog to Ngspice Converter. |
Makerchip-NgVeri:
Highlighting the message on the Terminal |
We see the Model Created Successfully has appeared in the terminal without any errors. |
Only Narration | Next, let us look at the concept of Linting in eSim. |
Slide:
About lint: |
|
Click on the Edit lint_off dropdown | Let us explore the Edit lint_off option by clicking on its drop-down.
We see the list of all the lint_off commands. The lint_off commands help to ignore lint_off warnings in Verilator compilation. |
Select EOFNEWLINE | Let us remove one of the lint_off commands and see what happens.
Select EOFNEWLINE from the drop-down menu. EOFNEWLINE occurs when there is no empty line at the end of file. |
Click on OK | Click on OK in the Warning dialog box. |
Click on the Edit lint_off dropdown | Now, again click on Edit lint_off drop-down.
We see that the command EOFNEWLINE is removed successfully. |
Makerchip-NgVeri:
Click on the Clear Terminal Button Click on Run Verilog to Ngspice Converter |
Let us generate the model again to see the changes.
Click on the Clear Terminal button and then on Run Verilog to Ngspice Converter |
Makerchip-NgVeri:Highlighting the error message in the Terminal
Scroll Up Highlight another error in the Terminal |
We see a message There was an error during model creation in the terminal.
Let us again scroll up to see why the error occurred. We see another message Missing newline at end of file. |
Point to the the text box near Add Lint_off option | To resolve this error, we need to add the EOFNEWLINE Lint_off command again.
We can see a text box to the left of the Add Lint_off option. |
Type EOFNEWLINE
Click on Add Lint_Off |
Type a lint_off command in the text box.
Let us type EOFNEWLINE in the text box. Then, click on the Add Lint_Off option. |
Click on Edit lint_off dropdown | Go back to the Edit lint_off drop-down and click on it. |
Point towards EOFNEWLINE command | We see that the command EOFNEWLINE is now added. |
Makerchip-NgVeri:
Click on the Clear Terminal Click on Run Verilog to Ngspice Converter |
Let us generate the model again.
Click on the Clear Terminal button to clear the terminal. Now click on Run Verilog to Ngspice Converter |
Makerchip-NgVeri:
Highlighting the message on the Terminal |
We see the Model Created Successfully in the terminal. |
Point towards Edit modlst | Let us look at how to see all the models present in NgVeri .
The Edit modlst option is used to see all the models present in the NgVeri. |
Click on the Edit modlst | Click on the Edit modlst drop-down.
We see a list of models. |
Only Narration | Let us see the purpose of removing the NgVeri model. |
Slide:
Removing NgVeri Model: |
|
Select counter4bit | For example, let us remove the counter4bit model assuming that it is giving error.
To do so, click on counter4bit from the drop-down. |
Click on OK | Click on OK in the Warning dialog box. |
Only Narration | The process may take some time. |
Highlight the build commands | We see the build commands have run in the terminal. |
Click on Edit modlst dropdown menu |
Let us now check whether the model is removed.
Again click on the Edit modlst dropdown. We see that the model counter4bit is removed successfully. |
Show Slide:Summary | This brings us to the end of this tutorial.
Let us summarize. In this tutorial, we have
in NgVeri. |
Show Slide: Assignment | As an assignment, please do the following:\
|
Show Slide: About the Spoken Tutorial Project | The video at the following link summarizes theSpoken Tutorial project.
Please download and watch it. |
Show Slide: Spoken Tutorial Workshops | The Spoken Tutorial Project team conducts workshops and gives certificates.
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Show Slide: Answers for THIS Spoken Tutorial | Please post your timed queries in this forum. |
Show Slide: FOSSEE Forum | For any general or technical questions on eSim, visit the FOSSEE forum and post your question. |
Show Slide: Circuit Simulation Project | The FOSSEE team coordinates the Circuit Simulation Project.
For more details, please visit this site. |
Show Slide: Textbook Companion Project | The FOSSEE team coordinates the TextBook Companion Project.
For more details, please visit this site. |
Show Slide: Lab Migration | The FOSSEE team coordinates the Lab Migration Project.
For more details, please visit this site. |
Show Slide:
Acknowledgement |
The Spoken Tutorial project is funded by the Ministry of Education, Government of India. |
Show Slide: Thank you | This is Josiga, a FOSSEE summer fellow 2022, IIT Bombay signing off.
Thanks for joining. |